mm74hct05 ?hex inverter (open drain) ?984 fairchild semiconductor corporation www.fairchildsemi.com mm74hct05 rev. 1.5.0 march 2008 mm74hct05 hex inverter (open drain) features open drain for wire-nor function ls-ttl pinout and threshold compatible fanout of 10 ls-ttl loads typical propagation delays: ? t pzl (with 1k ? resistor) 10ns ? t plz (with 1k ? resistor) 8ns general description the mm74hct05 is a logic function fabricated by using advanced silicon-gate cmos technology, which pro- vides the inherent benefits of cmos?ow quiescent power and wide power supply range. the device is also input and output characteristic and pinout compatible with standard dm74ls logic families. the mm74hct05 open drain hex inverter requires the addition of an exter- nal resistor to perform a wire-nor function. all inputs are protected from static discharge damage by internal diodes to v cc and ground. mm74hct devices are intended to interface between ttl and nmos components and standard cmos devices. these parts are also plug-in replacements for ls-ttl devices and can be used to reduce power con- sumption in existing designs. ordering information device also available in tape and reel. specify by appending suffix letter ??to the ordering number. all packages are lead free per jedec: j-std-020b standard. order number package number package description mm74hct05m m14a 14-lead small outline integrated circuit (soic), jedec ms-012, 0.150" narrow mm74hct05sj m14d 14-lead small outline package (sop), eiaj type ii, 5.3mm wide MM74HCT05MTC mtc14 14-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide mm74hct05n n14a 14-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300" wide
?984 fairchild semiconductor corporation www.fairchildsemi.com mm74hct05 rev. 1.5.0 2 mm74hct05 ?hex inverter (open drain) connection diagram top view logic diagram typical application
?984 fairchild semiconductor corporation www.fairchildsemi.com mm74hct05 rev. 1.5.0 3 mm74hct05 ?hex inverter (open drain) absolute maximum ratings (1) stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. notes: 1. unless otherwise specified all voltages are referenced to ground. 2. power dissipation temperature derating ?plastic ??package: ?2mw/? from 65? to 85?. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter rating v cc supply voltage ?.5 to +7.0v v in dc input voltage ?.5 to v cc +1.5v v out dc output voltage ?.5 to v cc +0.5v i ik , i ok clamp diode current ?0ma i out dc output current, per pin ?5ma i cc dc v cc or gnd current, per pin ?0ma t stg storage temperature range ?5? to +150? p d po w er dissipation note 2 600mw s. o. package only 500mw t l lead temperature (soldering 10 seconds) 260? symbol parameter min. max. units v cc supply voltage 4.5 5.5 v v in dc input voltage 0 v cc v v out dc output voltage 0 5.5 v t a operating temperature range ?0 +85 ? t r , t f input rise or fall times 500 ns
?984 fairchild semiconductor corporation www.fairchildsemi.com mm74hct05 rev. 1.5.0 4 mm74hct05 ?hex inverter (open drain) dc electrical characteristics (v cc = 5v ?10% unless otherwise specified) note: 3. this is measured per input with all other inputs held at v cc or ground. ac electrical characteristics v cc = 5v, t a = 25?,c l = 15pf, t r = t f = 6ns unless otherwise noted. ac electrical characteristics v cc = 5v, ?10%, c l = 50pf, t r = t f = 6ns unless otherwise specified. note: 4. c pd determines the no load dynamic power consumption, p d = c pd v cc 2 f+i cc v cc , and the no load dynamic current consumption, i s = c pd v cc f + i cc . symbol parameter conditions t a = 25? t a = ?0? to 85? units t yp. guaranteed limits v ih minimum high level input v oltage 2.0 2.0 v v il maximum low level input v oltage 0.8 0.8 v v ol maximum low level voltage v in = v ih , |i out | = 20? 0 0.1 0.1 v v in = v ih , |i out | = 4.0ma, v cc = 4.5v 0.2 0.26 0.33 v in = v ih , |i out | = 4.8ma, v cc = 5.5v 0.2 0.26 0.33 i in maximum input current v in = v cc or gnd, v ih or v il ?0.1 ?1.0 ? i lkg maximum high level output leakage current v in = v ih or v il , v out = v cc 0.5 5.0 ? i cc maximum quiescent supply current v in = v cc or gnd, i out = 0? 2.0 20 ? v in = 2.4v or 0.5v (3) 0.3 0.4 ma i ohz off state current v cc = 4.5v?.5v, v o = 5.5v 10 ? symbol parameter conditions typ. guaranteed limit units t pzl maximum propagation delay r l = 1k ? 815ns t plz maximum propagation delay r l = 1k ? 916ns symbol parameter conditions t a = 25? t a = ?0? to 85? units t yp. guaranteed limits t pzl maximum propagation delay r l = 1k ? 10 22 28 ns t plz maximum propagation delay r l = 1k ? 12 20 25 ns t thl maximum output fall time 10 15 19 ns c pd po w er dissipation capacitance (per gate), r l = , (4) 20 pf c in maximum input capacitance 5 10 pf
?984 fairchild semiconductor corporation www.fairchildsemi.com mm74hct05 rev. 1.5.0 5 mm74hct05 ?hex inverter (open drain) physical dimensions figure 1. 14-lead small outline integrated circuit (soic), jedec ms-012, 0.150" narrow pa c kage drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package speci?ations do not expand the terms of fairchild s worldwide terms and conditions, speci?ally the warranty therein, which covers fairchild products. always visit fairchild semiconductor s online packaging area for the most recent package drawings: http://www .f airchildsemi.com/pac kaging/ land pattern recommendation notes: unless otherwise specified a) this package conforms to jedec ms-012, variation ab, issue c, b) all dimensions are in millimeters. c) dimensions do not include mold flash or burrs. d) landpattern standard: soic127p600x145-14m e) drawing conforms to asme y14.5m-1994 f) drawing file name: m14arev13 pin one indicator 8 0 seating plane detail a scale: 20:1 gage plane 0.25 x45 1 0.10 c c b c a 7 m 14 b a 8 see detail a 5.60 0.65 1.70 1.27 8.75 8.50 7.62 6.00 4.00 3.80 (0.33) 1.27 0.51 0.35 1.75 max 1.50 1.25 0.25 0.10 0.25 0.19 (1.04) 0.90 0.50 0.36 r0.10 r0.10 0.50 0.25
?984 fairchild semiconductor corporation www.fairchildsemi.com mm74hct05 rev. 1.5.0 6 mm74hct05 ?hex inverter (open drain) physical dimensions (continued) figure 2. 14-lead small outline package (sop), eiaj type ii, 5.3mm wide pa c kage drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package speci?ations do not expand the terms of fairchild s worldwide terms and conditions, speci?ally the warranty therein, which covers fairchild products. always visit fairchild semiconductor s online packaging area for the most recent package drawings: http://www .f airchildsemi.com/pac kaging/
?984 fairchild semiconductor corporation www.fairchildsemi.com mm74hct05 rev. 1.5.0 7 mm74hct05 ?hex inverter (open drain) physical dimensions (continued) figure 3. 14-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide pa c kage drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package speci?ations do not expand the terms of fairchild s worldwide terms and conditions, speci?ally the warranty therein, which covers fairchild products. always visit fairchild semiconductor s online packaging area for the most recent package drawings: http://www .f airchildsemi.com/pac kaging/ c. dimensions are exclusive of burrs, mold flash, and tie bar extrusions f. drawing file name: mtc14rev6 r0.09 min 12.00 top & botto m 0.43 typ 1.00 d. dimensioning and tolerances per ansi y14.5m, 1982 r0.09min e. landpattern standard: sop65p640x110-14m 0.65 6.10 1.65 0.45 a. conforms to jedec registration mo-153, variation ab, ref note 6 b. dimensions are in millimeters
?984 fairchild semiconductor corporation www.fairchildsemi.com mm74hct05 rev. 1.5.0 8 mm74hct05 ?hex inverter (open drain) physical dimensions (continued) figure 4. 14-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300" wide pa c kage drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package speci?ations do not expand the terms of fairchild s worldwide terms and conditions, speci?ally the warranty therein, which covers fairchild products. always visit fairchild semiconductor s online packaging area for the most recent package drawings: http://www .f airchildsemi.com/pac kaging/ 14 8 7 1 notes: unless otherwise specified a) this package conforms to jedec ms-001 variation ba b) all dimensions are in millimeters. c) dimensions are exclusive of burrs, mold flash, and tie bar extrusions. d) dimensions and tolerances per asme y14.5-1994 e) drawing file name: mkt-n14arev7 6.60 6.09 8.12 7.62 0.35 0.20 19.56 18.80 3.56 3.30 5.33 max 0.38 min 1.77 1.14 0.58 0.35 2.54 3.81 3.17 8.82 (1.74)
?984 fairchild semiconductor corporation www.fairchildsemi.com mm74hct05 rev. 1.5.0 9 trademarks th ef ollowing includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its global s ubsidiaries, and is not intended to be an exhaustive list of all such trademarks. acex build it now coreplus crossvolt ctl current transfer logic ecospark ezswit ch * fairchild fairchild semiconductor fact quiet series fact fast fastvcore flashwriter ? fps frfet global power resource sm green fps green fps e-series gto i-lo intellimax isopla nar m egabuck mi crocoupler microfet micropak mi llerdrive mo ti on-spm optologic optopl anar pdp-spm pow er220 poweredge power-spm po we rtrench pr ogrammable active droop qfet qs qt optoelectronics quiet series rapidconfigure smart start spm stealth s uperfet su persot -3 s upersot -6 s upersot -8 s upremos syncfet the power franchise tinyboost tinybuck tinylogic tinyopto tinypower tinypwm tinywire serdes uhc ultra f rfet unifet vcx *ezswi tch and flashwriter are trademarks of system general corporation, used under license by fairchild semiconductor. disc laimer fa i rchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function, or design. fairchild does not assume any liability arising out of the application or use of any pro duct or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these speci fications do not expand t he terms of fairchild? wo rl dw ide terms and conditions, specifically the warranty therein, which covers these products. life support policy fa i rchild s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems wh ic h, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform wh en properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. pr oduct status definitions defi nition of terms da tasheet identification product status definition ad vance information formative or in design this datasheet contains the design specifications for product development. specifications may change in any manner without notice. pr eliminary first production this datasheet contains preliminary data; supplementary data will be published at a later date. fairchild semiconductor reserves the right to ma ke c hanges at any time without notice to improve design. no identification needed full production this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice to improve the des i gn. obsolete not in production this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. rev. i33 mm74hct05 ?hex inverter (open drain)
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